HAL : inria-00633527, version 1

DOI : 10.1007/978-3-642-23951-9_4

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Workshop on Cryptographic Hardware and Embedded Systems - CHES 2011, Nara : Japon (2011)

Improved Collision-Correlation Power Analysis on First Order Protected AES

Christophe Clavier 1, Benoit Feix 1, 2, Georges Gagnerot 1, 2, Mylène Roussellet 2, Vincent Verneuil 2, 3

(09/2011)

The recent results presented by Moradi et al. on AES at CHES 2010 and Witteman et al. on square-and-multiply always RSA exponentiation at CT-RSA 2011 have shown that collision-correlation power analysis is able to recover the secret keys on embedded implementations. However, we noticed that the attack published last year by Moradi et al. is not efficient on correctly first-order protected implementations. We propose in this paper improvements on collision-correlation attacks which require less power traces than classical second-order power analysis techniques. We present here two new methods and show in practice their real efficiency on two first-order protected AES implementations. We also mention that other symmetric embedded algorithms can be targeted by our new techniques.

1 :	XLIM (XLIM)
	CNRS : UMR6172 – Université de Limoges
2 :	Inside Secure
	Inside Secure
3 :	LFANT (INRIA Bordeaux - Sud-Ouest)
	INRIA – Université de Bordeaux – CNRS : UMR5251

Équipe de recherche (sauf Inria) : DMI

Domaine

:

Informatique/Cryptographie et sécurité

Mots-clés : AES – Side Channel Analysis – Collision – Correlation – DPA – Masking

inria-00633527, version 1

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Contributeur : Vincent Verneuil <>

Soumis le : Jeudi 27 Octobre 2011, 11:23:58

Dernière modification le : Vendredi 30 Mars 2012, 14:39:01