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| HAL : ujm-00634884, version 1 |
| Fiche détaillée |  Récupérer au format |
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| Journées scientifiques 2011 du projet SEmba, Valence : France (2011) |
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| generation of hardware emulation platforme for multi-FPGA based NoC |
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| Zhiwei Ge 1Junyan Tan 2 |
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| projet région cluster ISLE (Semba) Collaboration(s) |
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| (20/10/2011) |
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| Multi-FPGA based emulation platform for NoC (Network-on-Chip) gives a solution to the resource limitation of single FPGA based emulation platform. The generic design flow is needed to generate the emulation architecture for multi-FPGA based NoC.We propose a design flow that generates multi-FPGA based NoC. With the routing IP library for multi-FPGA based 3D NoC, the platform specification, the data transfer specification and emulation blocks, the generation tools can automatically generates a hardware emulation platform for multi-FPGA based NoC. |
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| 1 : | ASIC Design Center (ASIC Design Center) |
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University of tianjin |
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| 2 : | LAboratoire Hubert Curien (LAHC) |
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CNRS : UMR5516 – Université Jean Monnet - Saint-Etienne |
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| 3 : | Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA) |
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CNRS : UMR5159 – Université Joseph Fourier - Grenoble I – Institut National Polytechnique de Grenoble (INPG) |
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| domaine | : | Informatique/Systèmes embarqués |
| ujm-00634884, version 1 | |
| http://hal-ujm.ccsd.cnrs.fr/ujm-00634884 | |
| oai:hal-ujm.ccsd.cnrs.fr:ujm-00634884 | |
| Contributeur : Virginie Fresse | |
| Soumis le : Lundi 24 Octobre 2011, 11:25:54 | |
| Dernière modification le : Lundi 24 Octobre 2011, 11:25:54 | |
