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| HAL : inria-00554191, version 1 |
| Voir la fiche détaillée |  BibTeX,EndNote,... |
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| Proc. of the IEEE International Conference on Field-Programmable Technology (FPT'10), Beijing, China : China (2010) |
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| Accelerating HMMER on FPGA using Parallel Prefixes and Reductions |
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| Naeem Abbas 1Steven Derrien 1 |
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| Colorado State University Collaboration(s) |
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| (2010) |
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| HMMER is a widely used tool in bioinformatics, based on Profile Hidden Markov Models. The computation kernels of HMMER i.e. MSV and P7Viterbi are very compute intensive and data dependencies restrict to sequential execution. In this paper, we propose an original parallelization scheme for HMMER by rewriting their mathematical formulation, to expose the hidden potential parallelization opportunities. Our parallelization scheme targets FPGA technology, and our architecture can achieve 10 times speedup compared with that of latest HMMER3 SSE version, while not compromising on sensitivity of original algorithm. |
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| 1 : | CAIRN (INRIA - IRISA) |
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INRIA – CNRS : UMR6074 – École normale supérieure de Cachan - ENS Cachan – Institut National des Sciences Appliquées (INSA) - Rennes – Université de Rennes 1 |
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| 2 : | Colorado State University (CSU) |
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Colorado State University |
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| Domaine | : | Informatique/Architecture |
| inria-00554191, version 1 | |
| http://hal.inria.fr/inria-00554191 | |
| oai:hal.inria.fr:inria-00554191 | |
| Contributeur : Steven Derrien | |
| Soumis le : Lundi 10 Janvier 2011, 14:29:40 | |
| Dernière modification le : Jeudi 13 Janvier 2011, 11:21:41 | |
