HAL : inria-00449747, version 1

DOI : 10.1109/ASAP.2009.19

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20th IEEE International Conference on Application-specific Systems, Architectures and Processors, (ASAP 2009), Boston : États-Unis (2009)

Constraint-Driven Instructions Selection and Application Scheduling in the DURASE system

Kevin Martin 1, Christophe Wolinski 1, Krzysztof Kuchcinski 2, Antoine Floch 1, François Charot 1

(2009)

This paper presents a new constraint-driven method for computational pattern selection, mapping and application scheduling using reconfigurable processor extensions. The presented method is a part of DURASE system (Generic Environment for Design and Utilization of Reconfigurable Application-Specific Processors Extensions). The selected processor extensions are implemented as specialized processor instructions. They correspond to computational patterns identified as most frequently occurring or other interesting patterns in the application graph. Our methods can handle both time-constrained and resource-constrained scheduling. Experimental results obtained for the MediaBench and MiBench benchmarks show that the presented method ensures high speed-ups in application execution.

1 :	CAIRN (INRIA - IRISA)
	INRIA – CNRS : UMR6074 – École normale supérieure de Cachan - ENS Cachan – Institut National des Sciences Appliquées (INSA) - Rennes – Université de Rennes 1
2 :	Department of Computer Science [Lund]
	Lund University

Domaine

:

Informatique/Architecture

Mots-clés : ASIP – reconfigurable computing – scheduling – instruction selection – constraint programming

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Contributeur : François Charot <>

Soumis le : Vendredi 22 Janvier 2010, 15:05:54

Dernière modification le : Lundi 25 Janvier 2010, 11:09:22