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110 documents classés par : Date Titre Nom du premier auteur Type de documents Date de dépôt

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R2NoC : dynamically Reconfigurable Routers for flexible Networks on Chip Devaux L., Pillement S., Chillet D., Demigny D. International Conference on ReConFigurable Computing and FPGAs, Mexique (2010) [inria-00536711 - version 1]

OS services for Reconfigurable System-on-Chip Communications Devaux L., Pillement S., Chillet D., Demigny D. Design of Circuits and Integrated Systems, Espagne (2010) [inria-00536709 - version 1]

SoPC-based current controler for Permanent Magnet Synchronous Machines drive Bahri I., Monmasson E., Verdier F., Benkhelifa M. E. A. Dans Proceedings of - IEEE International Symposium on Industrial Electronics (ISIE'10), Italie (2010) [hal-00524773 - version 1]

On designing Efficient Codecs for Bus-Invert Berger Code for Fully Asymmetric Communication Piestrak S., Pillement S., Sentieys O. Transactions on Circuits and Systems, part II 57, 10 (2010) [inria-00480561 - version 1]

Design of a Fault-Tolerant Coarse-Grained Reconfigurable Architecture: A Case Study Jafri S., Piestrak S., Sentieys O., Pillement S. IEEE International Symposium on Quality Electronic Design (ISQED), United States (2010) [inria-00480553 - version 1]

RANN: A Reconfigurable Artificial Neural Network Model for Task Scheduling on Reconfigurable System-on-Chip Chillet D., Pillement S., Sentieys O. Dans Algorithm-Architecture Matching for Signal and Image Processing (2010) [inria-00480545 - version 1]

Comments on "A Low-Power Dependable Berger Code for Fully Asymmetric Communication" Piestrak S., Pillement S., Sentieys O. IEEE Communications Letters 14, 8 (2010) [inria-00480542 - version 1]

Energy Efficient Sensor Node Implementations Frigo J., Raby E., Rosten E., Kulathumani V., Wolinski C., Wagner C., Charot F., Brennan S. 8th International Symposium on Field-Programmable Gate Arrays (FPGA 2010), États-Unis (2010) [inria-00451689 - version 1]

Spatio-temporal Coding to Improve Speed and Noise Tolerance of On-chip Interconnect Pillement S., Philippe J., Sentieys O. MicroElectronic Journal of Integrated Circuits and Systems (2010) [inria-00438322 - version 1]

Automatic Design of Application-Specific Reconfigurable Processor Extensions with UPaK Synthesis Kernel Wolinski C., Kuchcinski K., Raffin E. ACM Transactions on Design Automation of Electronic Systems (TODAES) 15, 1 (2009) [inria-00451649 - version 1]