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| HAL: inria-00446036, version 1 |
| DOI: 10.1109/ISCAS.2009.5118446 |
| See detailed view |  BibTeX,EndNote,... |
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| IEEE International Symposium on Circuits and Systems, ISCAS 2009, Taipei : Taiwan, Province Of China (2009) |
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| On-Line Monitoring of Random Number Generators for Embedded Security |
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| Renaud Santoro 1Olivier Sentieys 1 |
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| (2009-05) |
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| Many embedded security chips require a high- quality Random Number Generator (RNG). Unfortunately, hard- ware RNG randomness can vary in time due to implementation defects or certain kinds of attacks. To overcome this issue, this paper presents the implementation of a battery of statistical test for randomness. The battery is selected for its efficient imple- mentation, making the area and power consumption insignificant. Performance and cost of the hardware implementation are given for FPGA and VLSI targets. Results show that statistical tests can easily be implemented in low-cost embedded security circuits and can enhance on-line monitoring of RNG randomness to prevent RNG failures. |
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| 1: | CAIRN (INRIA - IRISA) |
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INRIA – CNRS : UMR6074 – École normale supérieure de Cachan - ENS Cachan – Institut National des Sciences Appliquées (INSA) - Rennes – Université de Rennes 1 |
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| 2: | Laboratoire de Radiocommunications et de Traitement du Signal (LRTS) |
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Université de Laval |
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| Domain | : | Computer Science/Cryptography and Security Engineering Sciences/Micro and nanotechnologies/Microelectronics Computer Science/Architecture |
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| inria-00446036, version 1 | |
| http://hal.inria.fr/inria-00446036 | |
| oai:hal.inria.fr:inria-00446036 | |
| From: Olivier Sentieys | |
| Submitted on: Monday, 11 January 2010 18:22:00 | |
| Updated on: Wednesday, 13 January 2010 14:10:52 | |
