A new Low-Power recoding algorithm for multiplierless single/multiple constant multiplication.

Abdelkrim K. Oudjida (1) , Mohamed L. Berrandjia (1) , Nicolas Chaillet (2)

1 CDTA - Centre de Développement des Technologies Avancées
2 FEMTO-ST - Franche-Comté Électronique Mécanique, Thermique et Optique - Sciences et Technologies (UMR 6174)

Optimizing the number of additions in constant coefficient multiplication is conjectured to be a NP-hard problem. In this paper, we report a new heuristic requiring an average of 29.10 % and 10.61 % less additions than the standard canonical signed digit representation (CSD) and the double base number system (DBNS), respectively, for 64-bit coefficients. The maximum number of additions per coefficient is bounded by (N/4)+2, and the time-complexity of the recoding is linearly proportional to N, where N is the bit-size of the constant. These performances are achieved using a new redundant version of radix-28 recoding.

Domaines: Micro et nanotechnologies/Microélectronique

Abdelkrim K. Oudjida, Mohamed L. Berrandjia, Nicolas Chaillet. A new Low-Power recoding algorithm for multiplierless single/multiple constant multiplication.. IEEE Faible Tension Faible Consommation (FTFC'13), Jan 2013, France. pp.1-4. ⟨hal-00869542⟩