Modeling Mixed-critical Systems in Real-time BIP

Dario Socci (1) , Peter Poplavko (1) , Saddek Bensalem (1) , Marius Bozga (1)

1 VERIMAG - IMAG - VERIMAG

The proliferation of multi- and manycores creates an important design problem: the design and verification for mixed-criticality constraints in timing and safety, taking into account the resource sharing and hardware faults. In our work, we aim to contribute towards the solution of these problems by using a formal design language - the real time BIP, to model both hardware and software, functionality and scheduling. In this paper we present the initial experiments of modeling mixed-criticality systems in BIP.

Domaines: Systèmes embarqués

Dario Socci, Peter Poplavko, Saddek Bensalem, Marius Bozga. Modeling Mixed-critical Systems in Real-time BIP. 1st workshop on Real-Time Mixed Criticality Systems, Aug 2013, Taipei, Taiwan. ⟨hal-00867465⟩