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Communication Dans Un Congrès Année : 2012

An eco-design tool for manufacturers of semi-conductor technologies: looking for environmental opportunities in the design phase

Aurélie Villard
  • Fonction : Auteur
  • PersonId : 930757
Alan Lelah
  • Fonction : Auteur
  • PersonId : 5360
  • IdHAL : alan-lelah
Daniel Brissaud
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  • PersonId : 1074021

Résumé

The paper presents an eco-design methodology, dedicated to semi-conductor components manufacturers. This method aims to increase the designers' environmental consciousness and drive them systematically to explore innovative opportunities that can positively impact the environment during the early stages of design phase. The method relies on an original LCA-based tool for the environmental analysis of integrated circuits. It is developed in collaboration with a pilot team so as to help them develop and integrate their own eco-design approach. It allows the designers to acquire basic environmental knowledge and know-how during the analysis phase while ensuring high environmental performances of the microchips. The tool is organized into three main axes: characterizing design decisions in terms of impacts; controlling the evolution of new generations compared to older ones; and finding leverages for improvement. The environmental evaluation of a technology under development was initially assessed but as it is a preliminary work, the results were not directly used to design or re-design this technology. This pilot experiment gave encouraging results and validated the method capable of arousing the designers' interest on the environmental impact of their activity. The interpretation of the results allowed the design team to establish trends and directions for improvement for the future technologies they will design.
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Dates et versions

hal-00737235 , version 1 (01-10-2012)

Identifiants

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Aurélie Villard, Alan Lelah, Daniel Brissaud, Marc Mantelli. An eco-design tool for manufacturers of semi-conductor technologies: looking for environmental opportunities in the design phase. 2012 IEEE ISSST, May 2011, Boston, United States. pp.1-6, ⟨10.1109/ISSST.2012.6228013⟩. ⟨hal-00737235⟩
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