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| HAL : hal-00661495, version 1 |
| DOI : 10.1109/LED.2011.2163055 |
| Fiche détaillée |  Récupérer au format |
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| IEEE Electron Device Letters 32, 10 (2011) 1421 - 1423 |
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| High-Voltage 4H-SiC Thyristors With a Graded Etched Junction Termination Extension |
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| Gontran Pâques 1Sigo Scharnholz 1 |
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| (08/09/2011) |
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| For the first time, a graded etched junction termination extension (JTE) is applied to completed 4H-SiC gate turn-off thyristors. These devices demonstrate the feasibility of nonimplanted high-voltage SiC thyristors. The maximal measured forward breakdown voltage of 7.8 kV corresponds very well to the ideal value of 8.1 kV. This letter explains the conceptual procedure to realize an optimal four-step JTE and compares measurement results with those obtained from finite-element simulations. |
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| 1 : | Institut franco-allemand de recherches de Saint-Louis (ISL) |
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DGA |
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| 2 : | Ampère |
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CNRS : UMR5005 – Université Claude Bernard - Lyon I – Institut National des Sciences Appliquées (INSA) - Lyon – Ecole Centrale de Lyon |
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| 3 : | Institut für Stromrichtertechnik und Elektrische Antriebe (ISEA) |
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RWTH |
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| Domaine | : | Sciences de l'ingénieur/Energie électrique |
| hal-00661495, version 1 | |
| http://hal.archives-ouvertes.fr/hal-00661495 | |
| oai:hal.archives-ouvertes.fr:hal-00661495 | |
| Contributeur : Publications Ampère | |
| Soumis le : Jeudi 19 Janvier 2012, 16:54:35 | |
| Dernière modification le : Jeudi 19 Janvier 2012, 16:54:35 | |
