Improved Frequency Domain Architecture for the Digital Block of a Hardware Simulator for MIMO Radio Channels

Bachir Habib (1) , Gheorghe I. Zaharia (1) , Ghaïs El Zein (1)

1 IETR - Institut d'Electronique et de Télécommunications de Rennes

This paper presents a new frequency domain architecture for the digital block of a hardware simulator of MIMO propagation channels. This simulator can be used for UMTS and WLAN applications in indoor and outdoor environments. A hardware simulator must reproduce the behavior of the radio propagation channel, thus making it possible to test "on table" the mobile radio equipments. The advantages are: low cost, short test duration, possibility to ensure the same test conditions in order to compare the performance of various equipments. After the presentation of the general characteristics of the hardware simulator, the new architecture of the digital block is presented and designed on a Xilinx Virtex-IV FPGA, and its accuracy is analyzed.

Mots clés: Hardware Simulator; Radio Channel; MIMO; FPGA

Domaines: Electronique

Bachir Habib, Gheorghe I. Zaharia, Ghaïs El Zein. Improved Frequency Domain Architecture for the Digital Block of a Hardware Simulator for MIMO Radio Channels. International Symposium on Signals, Circuits and Systems, ISSCS 2011, Jun 2011, Iasi, Romania. pp.1-4, ⟨10.1109/ISSCS.2011.5978678⟩. ⟨hal-00624526⟩