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| HAL : hal-00576948, version 1 |
| Fiche détaillée |  Récupérer au format |
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| Formal Methods in System Design (2011) 10.1007/s10703-011-0114-4 |
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| Runtime Enforcement Monitors: composition, synthesis, and enforcement abilities |
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| Yliès Falcone 1Laurent Mounier 2 |
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| (11/03/2011) |
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| Runtime enforcement is a powerful technique to ensure that a program will respect a given set of properties. We extend previous work on this topic in several directions. Firstly, we propose a generic notion of enforcement monitors based on a memory device and finite sets of control states and enforcement operations. Moreover, we specify their enforcement abilities w.r.t. the general Safety-Progress classification of properties. Furthermore, we propose a systematic technique to produce a monitor from the automaton recognizing a given safety, guarantee, obligation or response property. Finally, we show that this notion of enforcement monitors is more amenable to implementation and encompasses previous runtime enforcement mechanisms. |
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| 1 : | VERTECS (INRIA) |
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INRIA |
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| 2 : | VERIMAG (VERIMAG - IMAG) |
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CNRS : UMR5104 – Université Joseph Fourier - Grenoble I – Institut National Polytechnique de Grenoble (INPG) |
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| 3 : | Laboratoire d'Informatique de Grenoble (LIG) |
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Université Joseph Fourier - Grenoble I – Institut polytechnique de Grenoble (Grenoble INP) – Université Pierre-Mendès-France - Grenoble II – CNRS : UMR5217 |
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| Domaine | : | Informatique/Systèmes embarqués |
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| Liste des fichiers attachés à ce document : | |||||
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| hal-00576948, version 1 | |
| http://hal.archives-ouvertes.fr/hal-00576948 | |
| oai:hal.archives-ouvertes.fr:hal-00576948 | |
| Contributeur : Yliès Falcone | |
| Soumis le : Mardi 15 Mars 2011, 18:09:26 | |
| Dernière modification le : Mercredi 16 Mars 2011, 09:45:17 | |
