déposer
version française rss feed
HAL : hal-00559986, version 1

Fiche détaillée  Récupérer au format
3rd Workshop on: Rapid Simulation and Performance Evaluation: Methods and Tools, Grèce (2011)
Faithfulness Considerations for Virtual Prototyping of Systems-on-Chip
Giovanni Funchal ( ) 1, 2, Matthieu Moy 1, Florence Maraninchi 1, Laurent Maillet-Contoz 3
(22/01/2011)

Virtual prototypes are simulators used in the con- sumer electronics industry. They enable the development of embedded software before the real, physical hardware is avail- able, hence providing important gains in speed of development and time-to-market. Transaction-level Modeling (TLM) is a widely used technique for designing such virtual prototypes. Its main insight is that many micro-architectural details (i.e. caches, fifos and pipelines) can be omitted from the model as they should not impact the behavior perceived from a software programmer's point-of- view. In this paper, we shall see that this assumption is not always true, specially for low-level software (e.g. drivers). As a result, there may be bugs in the software which are not observable on a TLM virtual prototype, designed according to the current modeling practices. We call this a faithfulness issue. Our experience shows that many engineers are not aware of this issue. Therefore, we provide an in-depth and intuitive explanation of the sort of bugs that may be missed. We claim that, to a certain extent, modified TLM models can be faithful without losing the benefits in terms of time-to-market and ease of modeling. However, further investigation is required to understand how this could be done in a more general framework.
1 :  VERIMAG (VERIMAG - IMAG)
CNRS : UMR5104 – Université Joseph Fourier - Grenoble I – Institut National Polytechnique de Grenoble (INPG)
2 :  STMicroelectronics (Grenoble) (ST-GRENOBLE)
STMicroelectronics
3 :  STMicroelectronics (Crolles) (ST-CROLLES)
STMicroelectronics
Informatique/Modélisation et simulation

Informatique/Architecture
Virtual prototyping – Faithfulness issues – Relaxed memory consistency – Transaction-level Modeling
Liste des fichiers attachés à ce document : 
PDF
paper.pdf(241.4 KB)

tous les articles de la base du CCSd...
tous les articles de la base du CCSd...
tous les articles de la base du CCSd...
tous les articles de la base du CCSd...
tous les articles de la base du CCSd...
tous les articles de la base du CCSd...
tous les articles de la base du CCSd...
tous les articles de la base du CCSd...
tous les articles de la base du CCSd...
tous les articles de la base du CCSd...
tous les articles de la base du CCSd...
tous les articles de la base du CCSd...
tous les articles de la base du CCSd...
tous les articles de la base du CCSd...
tous les articles de la base du CCSd...
tous les articles de la base du CCSd...
tous les articles de la base du CCSd...
tous les articles de la base du CCSd...
tous les articles de la base du CCSd...
tous les articles de la base du CCSd...
tous les articles de la base du CCSd...
tous les articles de la base du CCSd...
tous les articles de la base du CCSd...