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| HAL : hal-00484704, version 1 |
| DOI : 10.1016/j.aeue.2010.02.012 |
| Fiche détaillée |  Récupérer au format |
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| AEÜ - International Journal of Electronics and Communications / Archiv für Elektronik und Übertragungstechnik 65, 3 (2010) pp 250-257 |
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| FPGA implementation of vector directional distance filter based on HW/SW environment validation |
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| Anis Boudabous 1Ahmed Ben Atitallah 1, 2 |
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| (13/05/2010) |
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| In this paper a new FPGA implementation approach of vector directional distance filter (VDDF) using HW/SW solution is presented. The challenges of our solution include ease of implementation, good accuracy and relatively high speed. We use approximations to solve hardware limitations. HW/SW solution uses Nios-II FPGA development board. Experimental results using a number of color images show that the approximated VDDF achieves an excellent balance between computational speed and filtering quality. Moreover, the efficient design processes at 110 MHz system clock and gives a good execution time compared to the software based solution. |
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| 1 : | Laboratory of Electronics and Information Technology (LETI) |
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Université de Sfax |
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| 2 : | Laboratoire de l'intégration, du matériau au système (IMS) |
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CNRS : UMR5218 – Université Sciences et Technologies - Bordeaux I – Institut Polytechnique de Bordeaux |
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| 3 : | Dept. of Electrical and Computer Engineering |
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Sultan Qaboos University |
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| Domaine | : | Sciences de l'ingénieur/Micro et nanotechnologies/Microélectronique |
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| Nonlinear filter – Color image – FPGA implementation – Hardware acceleration |
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| hal-00484704, version 1 | |
| http://hal.archives-ouvertes.fr/hal-00484704 | |
| oai:hal.archives-ouvertes.fr:hal-00484704 | |
| Contributeur : Patrice Kadionik | |
| Soumis le : Mardi 18 Mai 2010, 19:44:48 | |
| Dernière modification le : Dimanche 28 Août 2011, 01:50:20 | |
