| HAL : hal-00418717, version 1 |
| Fiche détaillée | Récupérer au format |
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| Compilers for Parallel Computers workshop (CPC2007), Lisbon : Portugal (2007) |
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| An Hybrid Data Transfer Optimization Technique for GPGPU |
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| Eric Petit 1François Bodin 1 |
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| (2007) |
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| Graphical Processing Units (GPU) can provide tremendous computing power. Current NVidia and ATI hardware display a peak performance of hundreds of gigaflops. However, because of the data transfer speed between CPU and GPU is limited, those devices are difficult to use to accelerate numerical applications. In this paper we propose a software hybrid technique for automatically optimizing data transfer based on static and dynamic information on data accesses. |
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| 1 : | CAPS (INRIA - IRISA) |
| CNRS : UMR6074 – INRIA – INSA Rennes – Université de Rennes 1 | |
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| Domaine | : | Informatique/Calcul parallèle, distribué et partagé |
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| Astex – speculative – thread – automatic parallelization – codelet – hmpp – multicore – GPU – SoC – GPGPU – coprocessor – communication optimisation |
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| Liste des fichiers attachés à ce document : | |||||
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| hal-00418717, version 1 | |
| http://hal.archives-ouvertes.fr/hal-00418717 | |
| oai:hal.archives-ouvertes.fr:hal-00418717 | |
| Contributeur : Eric Petit | |
| Soumis le : Lundi 21 Septembre 2009, 15:13:08 | |
| Dernière modification le : Mardi 22 Septembre 2009, 08:51:03 | |