Efficient Verification of Timed Automata using Dense and Discrete Time Semantics

Marius Bozga (1) , Oded Maler (1) , Stavros Tripakis (1)

1 VERIMAG - IMAG - VERIMAG

In this paper we argue that the semantic issues of discrete vs dense time should be separated as much as possible from the pragmatics of state-space representation. Contrary to misconceptions, the discrete semantics is not inherently bound to use state-explosive techniques any more than the dense one. In fact, discrete timed automata can be analyzed using any representation scheme (such as DBM) used for dense time, and in addition can benefit from enumerative and symbolic techniques (such as BDDs) which are not naturally applicable to dense time. DBMs, on the other hand, can still be used more efficiently by taking into account the activity of clocks, to eliminate redundancy.

Keywords: timed automata; model checking; discrete/dense semantics; clock activity; STARI circuit

Domains: Embedded Systems

Marius Bozga, Oded Maler, Stavros Tripakis. Efficient Verification of Timed Automata using Dense and Discrete Time Semantics. Correct Hardware Design and Verification Methods 10th IFIP WG10.5 Advanced Research Working Conference, CHARME'99, Sep 1999, Bad Herrenalb, Germany. pp.125-141, ⟨10.1007/3-540-48153-2⟩. ⟨hal-00369798⟩