Efficient representation for formal verification of time performances of networked automation architectures

Silvain Ruel (1) , Olivier de Smet (1) , Jean-Marc Faure (1)

1 LURPA - Laboratoire Universitaire de Recherche en Production Automatisée

Networked automation architectures with Ethernet-based fieldbuses instead of traditional fieldbuses are more and more often used in industry, even for critical systems such as chemical or nuclear power plants. The strong safety requirements of these processes impose to evaluate the time performances of these complex architectures. Formal verification techniques are promising solutions to reach this objective. Hence, this paper focuses on the applicability of formal verification techniques to check time performances. On the basis of a case study, it is shown how formal models of networked automation architectures which are simple enough to be checked by existing timed model-checkers while yielding meaningful results can be developed.

Domaines: Automatique / Robotique

Silvain Ruel, Olivier de Smet, Jean-Marc Faure. Efficient representation for formal verification of time performances of networked automation architectures. 17th IFAC World Congress, Jul 2008, Séoul, South Korea. pp. 5119-5124. ⟨hal-00359064⟩