Synthesizing hardware from dataflow programs: An MPEG-4 simple profile decoder case study - Archive ouverte HAL Accéder directement au contenu
Communication Dans Un Congrès Année : 2008

Synthesizing hardware from dataflow programs: An MPEG-4 simple profile decoder case study

Résumé

The MPEG Reconfigurable Video Coding working group is developing a new library-based process for building the reference codecs of future MPEG standards, which is based on dataflow and uses an actor language called CAL. The paper presents a code generator producing RTL targeting FPGAs for CAL, outlines its structure, and demonstrates its performance on an MPEG-4 Simple Profile decoder. The resulting implementation is smaller and faster than a comparable RTL reference design, and the second half of the paper discusses some of the reasons for this counter-intuitive result.
Fichier principal
Vignette du fichier
2008_SIPS_Cal2HDL.pdf (160.98 Ko) Télécharger le fichier
Origine : Fichiers produits par l'(les) auteur(s)
Loading...

Dates et versions

hal-00336518 , version 1 (04-11-2008)

Identifiants

Citer

Jörn W. Janneck, Ian D. Miller, David B. Parlour, Ghislain Roquier, Matthieu Wipliez, et al.. Synthesizing hardware from dataflow programs: An MPEG-4 simple profile decoder case study. Signal Processing Systems, 2008. SiPS 2008. IEEE Workshop on, Oct 2008, Washington, United States. pp.287 - 292, ⟨10.1109/SIPS.2008.4671777⟩. ⟨hal-00336518⟩
171 Consultations
420 Téléchargements

Altmetric

Partager

Gmail Facebook X LinkedIn More