LusSy: an Open Tool for the Analysis of Systems-on-a-Chip at the Transaction Level

Matthieu Moy (1) , Florence Maraninchi (1) , Laurent Maillet-Contoz (2)

1 VERIMAG - IMAG - VERIMAG
2 ST-CROLLES - STMicroelectronics [Crolles]

We describe a toolbox for the analysis of Systems-on-a-chip written in SystemC at the transaction level. The tool is able to extract information from SystemC code, and to build a set of parallel automata that capture the semantics of a SystemC design, including the transaction-level specific constructs. As far as we know, this provides the first executable formal semantics of SystemC. Being implemented as a traditional compiler front-end, it is able to deal with general SystemC designs. The intermediate representation is now connected to existing formal verification tools via appropriate encodings. The toolbox is open and other tools will be used in the future.

Mots clés: SystemC; formal verification; lussy; pinapa; model-checking; lesar; lustre; tlm; transaction-level modeling

Domaines: Langage de programmation [cs.PL]; Systèmes embarqués; Modélisation et simulation

Matthieu Moy, Florence Maraninchi, Laurent Maillet-Contoz. LusSy: an Open Tool for the Analysis of Systems-on-a-Chip at the Transaction Level. Design Automation for Embedded Systems, 2005, 10 (32), pp.73-104. ⟨10.1007/s10617-006-9044-6⟩. ⟨hal-00310999⟩