LusSy: A toolbox for the analysis of systems-on-a-chip at the transactional level

Matthieu Moy (1) , Florence Maraninchi (1) , Laurent Maillet-Contoz (2)

1 VERIMAG - IMAG - VERIMAG
2 ST-CROLLES - STMicroelectronics [Crolles]

We describe a toolbox for the analysis of Systems-on-a-chip described in SystemC at the transactional level. The tools are able to extract information from SystemC code, and to build a set of parallel automata that capture the semantics of a SystemC design, including the transaction-level specific constructs. As far as we know, this provides the first executable formal semantics of SystemC. Being implemented as a traditional compiler front-end, it is able to deal with general SystemC designs. The intermediate representation is now connected to existing formal verification tools via appropriate encodings. The toolbox is open and other tools will be used in the future.

Mots clés: tlm; systemc; formal verification; model-checking; transaction-level modeling; smv; lustre; lesar

Domaines: Architectures Matérielles [cs.AR]; Systèmes embarqués

Matthieu Moy, Florence Maraninchi, Laurent Maillet-Contoz. LusSy: A toolbox for the analysis of systems-on-a-chip at the transactional level. International Conference on Application of Concurrency to System Design (ACSD), Jun 2005, Saint-Malo, France. pp.26 - 35, ⟨10.1109/ACSD.2005.23⟩. ⟨hal-00198681⟩