System Synthesis for Networks of Programmable Blocks

Ryan Mannion (1) , Harry Hsieh (1) , Susan Cotterell (1) , Frank Vahid (1, 2)

1 CSE - Department of Computer Science & Engineering [Riverside]
2 CECS - Center for Embedded Computer Systems [Irvine]

The advent of sensor networks presents untapped opportunities for synthesis. We examine the problem of synthesis of behavioral specifications into networks of programmable sensor blocks. The particular behavioral specification we consider is an intuitive user-created network diagram of sensor blocks, each block having a pre-defined combinational or sequential behavior. We synthesize this specification to a new network that utilizes a minimum number of programmable blocks in place of the pre-defined blocks, thus reducing network size and hence network cost and power. We focus on the main task of this synthesis problem, namely partitioning pre-defined blocks onto a minimum number of programmable blocks, introducing the efficient but effective PareDown decomposition algorithm for the task. We describe the synthesis and simulation tools we developed. We provide results showing excellent network size reductions through such synthesis, and significant speedups of our algorithm over exhaustive search while obtaining near-optimal results for 15 real network designs as well as nearly 10,000 randomly generated designs.

Domaines: Architectures Matérielles [cs.AR]; Electronique

Ryan Mannion, Harry Hsieh, Susan Cotterell, Frank Vahid. System Synthesis for Networks of Programmable Blocks. DATE'05, Mar 2005, Munich, Germany. pp.888-893. ⟨hal-00181678⟩