Design Optimization of Time-and Cost-Constrained Fault-Tolerant Distributed Embedded Systems

Viacheslav Izosimov (1) , Paul Pop (1) , Petru Eles (1) , Zebo Peng (1)

1 CS Dep

In this paper we present an approach to the design optimization of fault-tolerant embedded systems for safety-critical applications. Processes are statically scheduled and communications are performed using the time-triggered protocol. We use process re-execution and replication for tolerating transient faults. Our design optimization approach decides the mapping of processes to processors and the assignment of fault-tolerant policies to processes such that transient faults are tolerated and the timing constraints of the application are satisfied. We present several heuristics which are able to find fault-tolerant implementations given a limited amount of resources. The developed algorithms are evaluated using extensive experiments, including a real-life example.

Domaines: Architectures Matérielles [cs.AR]; Electronique

Viacheslav Izosimov, Paul Pop, Petru Eles, Zebo Peng. Design Optimization of Time-and Cost-Constrained Fault-Tolerant Distributed Embedded Systems. DATE'05, Mar 2005, Munich, Germany. pp.864-869. ⟨hal-00181227⟩