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International Symposium on VLSI Design, Automation and Test (VLSI-DAT'07), Hsinchu : Taïwan, Province De Chine (2007)

Mixed hardware software multilevel modeling and simulation for multithreaded heterogeneous MPSoC

K. Popovici 1, X. Guérin 1, L. Brisolara 1, A. A. Jerraya 1

(2007)

In this paper, we introduce a Mixed Hardware – Software Architecture Model to abstract hardware-software interfaces of multithreaded heterogeneous multiprocessor architecture with specific hardware I/O. We use Simulink environment as modeling language to capture this representation. We generate two intermediate simulation models called Virtual Architecture and Transaction Accurate to validate the software during the different design steps. The software refinement is performed by automatic software code generation for parallel application from Simulink model, and automatic low level software customization for specific architecture. Through experiments we show the efficiency of the proposed design flow that decreases design time without affecting design quality.

1 :	Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA)
	CNRS : UMR5159 – Université Joseph Fourier - Grenoble I – Institut National Polytechnique de Grenoble (INPG)

Domaine

:

Sciences de l'ingénieur/Micro et nanotechnologies/Microélectronique

Mots Clés : hardware/software co-design

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Contributeur : Lucie Torella <>

Soumis le : Jeudi 21 Juin 2007, 11:07:31

Dernière modification le : Mercredi 21 Mai 2008, 11:15:17