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| HAL : hal-00015228, version 1 |
| DOI : 10.1109/EUASIC.1992.228013 |
| Fiche détaillée |  Récupérer au format |
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| Proceedings.-Euro-ASIC-'92-Cat.-No.92TH0442-4., Paris : France (1992) |
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| An application specific microprocessor with two-level built-in control flow checking capabilities |
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| T. Michel 1R. Leveugle 1, 2 |
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| (1992) |
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| Concurrent checking consists of permanently verifying the behavior of a system by checking significant invariant properties to detect with a short latency either permanent or transient faults. Several types of methods have been proposed. The authors consider here control flow checking applied to microprocessor-based systems. Control flow invariant properties can be defined to verify the sequencing in the control part of the microprocessor, or the application program execution. Control flow checking has been implemented at these two levels in an application specific 32-bit microprocessor designed in the CMOS 1.5 mu technology from VLSI Technology. This processor, partly designed within a VLSI student project, is being manufactured by the French Multi Project organization. |
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| 1 : | CSI, INPG, Grenoble (CSI) |
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Institut National Polytechnique de Grenoble (INPG) |
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| 2 : | Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA) |
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CNRS : UMR5159 – Université Joseph Fourier - Grenoble I – Institut National Polytechnique de Grenoble (INPG) |
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| Domaine | : | Sciences de l'ingénieur/Micro et nanotechnologies/Microélectronique |
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| permanent-faults – error-handling – transaction-processing – control-flow-checking – invariant-properties – latency- – transient-faults – microprocessor-based-systems – sequencing- – application-program-execution – CMOS- – 32-bits – 1.5-micron |
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| hal-00015228, version 1 | |
| http://hal.archives-ouvertes.fr/hal-00015228 | |
| oai:hal.archives-ouvertes.fr:hal-00015228 | |
| Contributeur : Lucie Torella | |
| Soumis le : Lundi 5 Décembre 2005, 14:47:25 | |
| Dernière modification le : Jeudi 23 Février 2006, 15:51:09 | |
