| HAL : hal-00014217, version 1 |
| DOI : 10.1109/EURDAC.1996.558246 |
| Fiche détaillée | Récupérer au format |
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| Proceedings-EURO-DAC-'96.-European-Design-Automation-Conference-with-EURO-VHDL-'96-and-Exhibition-Cat.-No.96CB36000, Geneva : Suisse (1996) |
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| Automatic diagnosis may replace simulation for correcting simple design errors |
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| A. Wahba 1D. Borrione 2 |
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| (1996) |
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| An automated tool for diagnosing simple design errors in VHDL description is presented. The tool is tested on benchmark circuits, and the results show that the error is localized precisely, after the application of a small number of specially generated test patterns. This tool is now integrated within the PREVAIL/sup TM/ system, and is being tested on industrial circuits. |
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| 1 : | Mentor Graphics Egypt (MENTOR GRAPHICS EGYPT) |
| Mentor | |
| 2 : | Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA) |
| CNRS : UMR5159 – Université Joseph Fourier - Grenoble I – Institut National Polytechnique de Grenoble (INPG) | |
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| Domaine | : | Sciences de l'ingénieur/Micro et nanotechnologies/Microélectronique |
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| automatic-diagnosis – simple-design-error-correction – VHDL-description – benchmark-circuits – specially-generated-test-patterns – industrial-circuits – combinational-circuits – sequential-circuits – test-pattern-generation |
| hal-00014217, version 1 | |
| http://hal.archives-ouvertes.fr/hal-00014217 | |
| oai:hal.archives-ouvertes.fr:hal-00014217 | |
| Contributeur : Lucie Torella | |
| Soumis le : Mardi 22 Novembre 2005, 10:06:54 | |
| Dernière modification le : Jeudi 13 Avril 2006, 13:50:27 | |