| HAL : hal-00014002, version 1 |
| DOI : 10.1109/FTCS.1992.243610 |
| Fiche détaillée | Récupérer au format |
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| Digest-of-Papers.-FTCS-22.-The-Twenty-Second-International-Symposium-on-Fault-Tolerant-Computing-Cat.-No.92CH3155-9, Boston, MA : États-Unis (1992) |
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| Design of static CMOS self-checking circuits using built-in current sensing |
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| Lo Jien-Chung 1J.-C. Daly 1 |
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| (1992) |
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| The authors present a novel scheme for implementing self-checking circuits in static CMOS. A strongly code disjoint (SCD) built-in current sensor (BICS) is presented. It is used to cover faults whose detection cannot be guaranteed by logic monitoring. A previously fabricated and tested high-speed BICS is examined for its behavior in the presence of faults. Then, a self-exercising mechanism is designed to obtain the SCD property. The integration of this SCD BICS with a self-checking circuit achieves the well-known goal of total self-checking. |
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| 1 : | Dept. of Electr. & Comput. Eng., Rhode Island Univ. (DEPT. OF ELECTR. & COMPUT. ENG., RHODE ISLAND UNIV.) |
| University of Rhode Island | |
| 2 : | iROc Technologies (IROC TECHNOLOGIES) |
| Cadence Connection – EDA Consortium – FSA – Cubic Micro | |
| 3 : | Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA) |
| CNRS : UMR5159 – Université Joseph Fourier - Grenoble I – Institut National Polytechnique de Grenoble (INPG) | |
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| Domaine | : | Sciences de l'ingénieur/Micro et nanotechnologies/Microélectronique |
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| static-CMOS-self-checking-circuits – built-in-current-sensing – strongly-code-disjoint – logic-monitoring – self-exercising-mechanism – total-self-checking |
| hal-00014002, version 1 | |
| http://hal.archives-ouvertes.fr/hal-00014002 | |
| oai:hal.archives-ouvertes.fr:hal-00014002 | |
| Contributeur : Lucie Torella | |
| Soumis le : Mercredi 16 Novembre 2005, 15:46:47 | |
| Dernière modification le : Lundi 10 Avril 2006, 16:35:11 | |