eISP, une architecture de calcul programmable pour l'amélioration d'images sur téléphone portable.

Thevenin Mathieu (1) , Paindavoine Michel (2) , Laurent Letellier (1) , Heyrman Barthelemy (2)

1 LCEI - Laboratoire Calculateurs Embarqués et Image
2 Le2i - Laboratoire Electronique, Informatique et Image [UMR6306]

Today's smart phones, with their embedded high-resolution video sensors, require computing capacities that are too high to easily meet stringent silicon area and power consumption requirements (some one and a half square millimeters and half a watt) especially when programmable components are used. To develop such capacities, integrators still rely on dedicated low resolution video processing components, whose drawback is low flexibility. With this in mind, our paper presents eISP {--} a new, fully programmable Embedded Image Signal Processor architecture, now validated in {TSMC~65nm} technology to achieve a capacity of {16.8~GOPs} at {233~MHz}, for {1.5~mm$^2$} of silicon area and a power consumption of {250~mW}. Its resulting efficiency ({67~MOPs/mW}), has made eISP the leading programmable architecture for signal processing, especially for {HD~1080p} video processing on embedded devices such as smart phone.

Mots clés: eISP; low power; CMOS; video pipe; image processing; SIMD; Multi-SIMD

Domaines: Traitement du signal et de l'image [eess.SP]; Informatique mobile; Traitement du signal et de l'image [eess.SP]

Thevenin Mathieu, Paindavoine Michel, Laurent Letellier, Heyrman Barthelemy. eISP, une architecture de calcul programmable pour l'amélioration d'images sur téléphone portable.. 2009. ⟨cea-00445727⟩